• DocumentCode
    2193902
  • Title

    NPT-IGBT-optimizing for manufacturability

  • Author

    Burns, Darryl ; Deram, Lvana ; Mello, James ; Morgan, James ; Wan, Irene ; Robb, Francine

  • Author_Institution
    Power Products Div., Motorola Inc., Phoenix, AZ, USA
  • fYear
    1996
  • fDate
    20-23 May 1996
  • Firstpage
    331
  • Lastpage
    334
  • Abstract
    High-voltage NPT-IGBTs (non-punchthrough IGBTs) offer reasonable on-state voltages, high short-circuit ruggedness, and minimal turn-off losses without lifetime killing. In addition, NPT-IGBTs have the potential to reduce fabrication costs as compared to conventional epitaxial IGBTs because they are fabricated on low cost bulk silicon substrates, while conventional IGBTs utilize thick, expensive epitaxial layers. The key to realizing this potential cost savings, however, is the development of a manufacturable thin-wafer back end process flow. This paper will discuss NPT-IGBT process optimization, aimed at increased manufacturability. Starting material specifications, backside process optimization, and thin-wafer manufacturability issues are addressed
  • Keywords
    insulated gate bipolar transistors; losses; semiconductor device manufacture; semiconductor device reliability; NPT-IGBTs; Si; backside process optimization; fabrication costs; manufacturability; non-punchthrough IGBTs; on-state voltages; short-circuit ruggedness; starting material specifications; thin-wafer back end process flow; turn-off losses; Boron; Costs; Etching; Fabrication; Gettering; Implants; Insulated gate bipolar transistors; Manufacturing processes; Silicon; Substrates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Semiconductor Devices and ICs, 1996. ISPSD '96 Proceedings., 8th International Symposium on
  • Conference_Location
    Maui, HI
  • ISSN
    1063-6854
  • Print_ISBN
    0-7803-3106-0
  • Type

    conf

  • DOI
    10.1109/ISPSD.1996.509509
  • Filename
    509509