DocumentCode :
2193906
Title :
The effect of instruction fetch bandwidth on value prediction
Author :
Gabbay, Freddy ; Mendelson, Avi
Author_Institution :
Dept. of Electr. Eng., Technion-Israel Inst. of Technol., Haifa, Israel
fYear :
1998
fDate :
27 Jun-1 Jul 1998
Firstpage :
272
Lastpage :
281
Abstract :
Value prediction attempts to eliminate true-data dependencies by dynamically predicting the outcome values of instructions and executing true-data dependent instructions based on that prediction. In this paper we attempt to understand the limitations of using this paradigm in realistic machines. We show that the instruction-fetch bandwidth and the issue rate have a very significant impact on the efficiency of value prediction. In addition, we study how recent techniques to improve the instruction-fetch rate affect the efficiency of value prediction and its hardware organization
Keywords :
computer architecture; instruction sets; hardware organization; instruction fetch bandwidth; instruction-fetch rate; true-data dependent instructions; value prediction; Accuracy; Bandwidth; Data mining; Dies; Hardware; Microprocessors; Performance gain; Predictive models; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Architecture, 1998. Proceedings. The 25th Annual International Symposium on
Conference_Location :
Barcelona
ISSN :
1063-6897
Print_ISBN :
0-8186-8491-7
Type :
conf
DOI :
10.1109/ISCA.1998.694787
Filename :
694787
Link To Document :
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