Analysis of direct wafer bond IGBTs with heavily doped N+ buffer layer

Author

Tu, S.L. ; Tam, Gordon ; Tam, Pak ; Tsoi, H.-Y. ; Taomoto, Aileen

Author_Institution

Adv. Custom Technol. Center, Motorola Inc., Mesa, AZ, USA

fYear

1996

fDate

20-23 May 1996

Firstpage

339

Lastpage

342

Abstract

High-speed IGBTs fabricated using direct wafer bonding and implanted N+ buffer layer are described and analyzed in this paper. The trade-off between on-state voltage drop and turn-off fall time can be controlled by varying the N+ implant dose prior to the wafer bonding process. 800 V IGBTs with switching time less than 100 nanoseconds and V _ce(sat) as low as 1.4 V at 100 A/cm² have been obtained. This excellent performance is achieved without utilizing any conventional lifetime control techniques

Keywords

heavily doped semiconductors; insulated gate bipolar transistors; ion implantation; power semiconductor switches; semiconductor device models; wafer bonding; 100 ns; 800 V; N+ implant dose; direct wafer bond IGBTs; heavily doped N+ buffer layer; on-state voltage drop; switching time; turn-off fall time; Buffer layers; Doping; Electron devices; Implants; Insulated gate bipolar transistors; Insulation; Spontaneous emission; Temperature; Voltage; Wafer bonding;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Semiconductor Devices and ICs, 1996. ISPSD '96 Proceedings., 8th International Symposium on

Conference_Location

Maui, HI

ISSN

1063-6854

Print_ISBN

0-7803-3106-0

Type

conf

DOI

10.1109/ISPSD.1996.509511

Filename

509511