Decoupling of High Performance Semiconductors Using Embedded Capacitor Technology

The integration of embedded DuPont ceramic capacitors and HiK polyimide based planar capacitor materials in IC packages has been investigated by a joint program between DuPont and Georgia Institute of Technology packaging research center (PRC). Test vehicles with different types of structures were designed, fabricated and tested for individual device characterization. The test vehicles included embedded ceramic-fired-on-foil capacitors with microvia interconnects and two sequential industry standard build-up layers on each side of a BT core. Feature sizes were 12 micron lines and spaces and 50 micron diameter microvias. Other test vehicles used a core layer without build-up layers, planar capacitor layers and arrays of discrete capacitors with different size, capacitance, and interconnection designs. Each capacitor variation was electrically characterized. The electrical performance data from the test vehicles was used to perform simulations to determine the designs offering the most effective power delivery and noise decoupling for a package having 2007 ITRS die and substrate features. The embedded ceramic capacitors show a significant improvement in power system noise decoupling and charge supply to the IC in the mid-frequency range due to the low inductance design.