DocumentCode
2195354
Title
Standard cell library characterization for setting current limits for I/sub DDQ/ testing
Author
Millman, S.D. ; Acken, J.M.
Author_Institution
Motorola Inc., Tempe, AZ, USA
fYear
1996
fDate
24-25 Oct. 1996
Firstpage
41
Lastpage
44
Abstract
Industry needs to move from a separate step of design for test to solving test issues as an integral part of the design process. The linking of design and test is also needed for I/sub DDQ/ testing, which is required for high quality products. A key issue is how to set the I/sub DDQ/ current limit to detect defective parts without rejecting defect-free parts. Increasing design efforts for accurate standard cell library characterization, especially with respect to power provide the answer. This paper describes a method for setting the I/sub DDQ/ limit based upon cell library characterization. Additionally, the method for iterating in on the final values is reviewed and contrasted with the benefits of the new method.
Keywords
design for testability; integrated circuit testing; IC; IDDQ testing; current limits; design; standard cell library; Automatic testing; Circuit faults; Circuit testing; Integrated circuit testing; Libraries; Logic testing; Manufacturing; Power supplies; Semiconductor device measurement; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
IDDQ Testing, 1996., IEEE International Workshop on
Conference_Location
Washington, DC, USA
Print_ISBN
0-8186-7655-8
Type
conf
DOI
10.1109/IDDQ.1996.557810
Filename
557810
Link To Document