DocumentCode
2195885
Title
The robustness of small developed SBlock circuits using different clocking schemes
Author
Van Remortel, Piet ; Lenaerts, Tom ; Manderick, Bernard
Author_Institution
Dept. of Comput. Sci., Vrije Univ., Brussels, Belgium
fYear
2002
fDate
2002
Firstpage
26
Lastpage
35
Abstract
Biological development is a stunning mechanism that allows robust generation of complex structures from a linear building plan. This makes it an interesting source of inspiration for solving problems where direct manipulation of a higher-order structure is hard, and the generative building plan can be used as a substitute for indirect manipulation of the unfolded structure. We investigate the possibility of adopting a nondeterministic developmental mapping in the evolution of electronic circuits, which demands that phenotypes be functionally stable despite limited structural change. We study the functional robustness of small SBlock circuits under different amounts and types of ´developmental´ noise, using different clocking schemes. We report an exponential decrease in robustness with increasing noise. We provide experimental results that show that noise injected later on the developmental timescale shows less harmful then ´early´ noise. This effect becomes more significant as the total amount of noise increases. The relative ranking of the effects of different types of noise seems not affected by the clocking scheme.
Keywords
circuit CAD; evolutionary computation; reconfigurable architectures; artificial developmental; clocking schemes; complex structures; developmental mapping; evolution of electronic circuits; evolutionary optimisation; evolvable hardware; functional robustness; robust generation; small SBlock circuits; Circuits; Clocks; Hardware; NASA; Robustness; US Department of Defense;
fLanguage
English
Publisher
ieee
Conference_Titel
Evolvable Hardware, 2002. Proceedings. NASA/DoD Conference on
Print_ISBN
0-7695-1718-8
Type
conf
DOI
10.1109/EH.2002.1029862
Filename
1029862
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