Design of GaAs MMIC transistors for the low-power low noise applications

Author

Nosal, Z.M.

Author_Institution

Inst. of Electron. Syst., Warsaw Univ. of Technol., Poland

fYear

2000

fDate

10-13 June 2000

Firstpage

205

Lastpage

208

Abstract

The paper investigates the problem of minimizing bias power for the low noise GaAs amplifiers. The model of the amplifier parameters versus transistor gate width is presented and used to derive the conditions for noise optimization. It is shown that optimum FETs are rather wide and may operate at very low current densities. Complete amplifier stages with only 3-5 mW bias power are feasible at 2 GHz with noise figures below 1 dB.

Keywords

III-V semiconductors; MMIC amplifiers; UHF amplifiers; UHF field effect transistors; UHF integrated circuits; equivalent circuits; field effect MMIC; gallium arsenide; integrated circuit noise; low-power electronics; microwave field effect transistors; semiconductor device models; semiconductor device noise; 1 dB; 2 GHz; 3 to 5 mW; GaAs; GaAs MMIC transistors; GaAs amplifiers; amplifier parameters; bias power minimisation; low noise applications; low-power applications; noise optimization; optimum FETs; transistor gate width; Circuit noise; Gallium arsenide; Impedance; Low-frequency noise; Low-noise amplifiers; MMICs; Microwave FETs; Microwave transistors; Noise figure; Noise measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2000. Digest of Papers. 2000 IEEE

Conference_Location

Boston, MA, USA

ISSN

1529-2517

Print_ISBN

0-7803-6280-2

Type

conf

DOI

10.1109/RFIC.2000.854449

Filename

854449