Title :
Lateral npn bipolar transistor for high current gain applications at reduced temperatures
Author :
Woo, Jason C S ; Wong, Simon ; Verdonckt-Vanderbroek, S. ; Ko, P. ; Terrill, Kyle ; Vasudev, P.K.
Author_Institution :
California Univ., Los Angeles, CA, USA
Abstract :
The possibility of operating a high-current-gain lateral bipolar junction transistor (BJT), derived from a CMOS structure by jointing the gate and the substrate to form the base of the BJT, at very low temperature is described. This transistor does not suffer any current gain degradation at 77 K due to heavy doping effects. The structure can also be used in a BiCMOS technology on SOI. The principles of operation are described, and the device parasitics are discussed. Experimental results for a device obtained from a 0.5-μm MOSFET and for an equivalent device built on a 0.3-μm SOI with ZMR epitaxial layer are presented and discussed
Keywords :
bipolar transistors; semiconductor technology; 0.3 micron; 0.5 micron; 77 K; BiCMOS technology on SOI; CMOS structure derived; MOSFET; ZMR epitaxial layer; device parasitics; experimental results; high current gain at low temperatures; lateral bipolar junction transistor; low temperature operation; npn bipolar transistor; operation; BiCMOS integrated circuits; Bipolar transistors; CMOS technology; Cathodes; Circuit noise; Cryogenics; Degradation; Spontaneous emission; Temperature; Working environment noise;
Conference_Titel :
Bipolar Circuits and Technology Meeting, 1989., Proceedings of the 1989
Conference_Location :
Minneapolis, MN
DOI :
10.1109/BIPOL.1989.69480
