DocumentCode :
2196542
Title :
Design and Implementation of the Time-Partition SDRAM Controller
Author :
Chen Chao ; Xu Weizhang ; Yang Zhan Xin
Author_Institution :
Eng. Center of Digital Audio & Video, Commun. Univ. of China, Beijing, China
fYear :
2009
fDate :
20-22 Sept. 2009
Firstpage :
1
Lastpage :
4
Abstract :
Generally, the traditional SDRAM controllers use an arbitral form to deal with the variable accessing requirement. But the design of the arbitral form is very complex. To avoid the complexity, this article introduces a time-partition form SDRAM controller based on multi-DAB project, and compares the arbitral form controller and the time-partition form. At last, the paper analyzes the new form of SDRAM controller and makes a conclusion.
Keywords :
DRAM chips; logic design; arbitral form controller; multi-DAB project; synchronous dynamic random access memory; time-partition form SDRAM controller; Chaotic communication; Communication system control; Control systems; DRAM chips; Design engineering; Embedded system; Field programmable gate arrays; Pulp manufacturing; Read-write memory; SDRAM;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Management and Service Science, 2009. MASS '09. International Conference on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4244-4638-4
Electronic_ISBN :
978-1-4244-4639-1
Type :
conf
DOI :
10.1109/ICMSS.2009.5305614
Filename :
5305614
Link To Document :
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