Title :
Flexible IF processors for future communications payloads
Author :
Barretto, P.S.D.R.
Author_Institution :
ALCATEL ESPACE, Toulouse
Abstract :
This paper presents an IF processor built around a “brick-wall” named BIFFAC, using SAW filters, ASICs and FPGAs on just one multilayer printed circuit board. This BIFFAC provides the input multiplexing of a 21 MHz bandwidth to up to 4 outputs having independently programmable sub-bands, in steps of 3 MHz, and gains of up to 31 dB by 1 dB steps. A breadboard of one IF processor using 3 BIFFACs has been built, emulating a flexible payload, interconnecting two up-links to two down links. Measurements results and hardware photos are presented
Keywords :
application specific integrated circuits; digital signal processing chips; field programmable gate arrays; multiplexing; multiplexing equipment; printed circuits; satellite communication; satellite links; surface acoustic wave filters; 21 MHz; 31 dB; ASIC; BIFFAC; FPGA; IF processors; SAW filters; bandwidth; breadboard; brick-wall; down links; flexible payload; gain; input multiplexin; measurements results; multilayer printed circuit board; programmable subbands; satellite communication payloads; up-links; Bandwidth; Energy consumption; Field programmable gate arrays; Filtering; Frequency conversion; Integrated circuit interconnections; Nonhomogeneous media; Payloads; Routing; Surface acoustic waves;
Conference_Titel :
Microwave and Optoelectronics Conference, 1995. Proceedings., 1995 SBMO/IEEE MTT-S International
Conference_Location :
Rio de Janeiro
Print_ISBN :
0-7803-2674-1
DOI :
10.1109/SBMOMO.1995.509620
