Title :
An On-Line BIST Technique for Delay Fault Detection in CMOS Circuits
Author :
Moghaddam, Elham K. ; Hessabi, Shaahin
Author_Institution :
Sharif Univ. of Technol., Tehran
Abstract :
This paper presents a simulation-based study of the delay fault testing in CMOS logic circuits. A novel built-in self-test (BIST) technique is presented for detecting delay faults in this logic family. This scheme does not need test-pattern generation, and thus can be used for robust on-line testing. Simulation results for area, delay, and power overheads are presented.
Keywords :
CMOS logic circuits; built-in self test; fault simulation; logic testing; CMOS logic circuits; built-in self-test technique; delay fault detection; delay fault testing; on-line BIST technique; Built-in self-test; CMOS logic circuits; Circuit faults; Circuit simulation; Circuit testing; Delay; Electrical fault detection; Fault detection; Logic testing; Robustness;
Conference_Titel :
Asian Test Symposium, 2007. ATS '07. 16th
Conference_Location :
Beijing
Print_ISBN :
978-0-7695-2890-8
DOI :
10.1109/ATS.2007.100
