DocumentCode :
2197179
Title :
A High Compression and Short Test Sequence Test Compression Technique to Enhance Compressions of LFSR Reseeding
Author :
Wang, Seongmoon ; Wei, Wenlong ; Chakradhar, Srimat T.
Author_Institution :
NEC Lab. America, Princeton
fYear :
2007
fDate :
8-11 Oct. 2007
Firstpage :
79
Lastpage :
86
Abstract :
This paper presents a test data compression scheme that can be used to further improve compressions achieved by LFSR reseeding. The proposed compression technique can be implemented with very low hardware overhead. Unlike most commercial test data compression tools, the proposed method requires no special ATPG that is customized for the proposed scheme and can be used to compress test patterns generated by any ATPG tool. The test data to be stored in the ATE memory are much smaller than that for previously published schemes and the number of test patterns that need to be generated is smaller than other weighted random pattern testing schemes. Experimental results on a large industry design show that over 1600X compression is achievable by the proposed scheme with the number of patterns comparable to that of highly compacted deterministic patterns.
Keywords :
automatic test equipment; data compression; shift registers; LFSR reseeding; test compression technique; test data compression; Automatic test pattern generation; Automatic testing; Built-in self-test; Hardware; National electric code; Random number generation; Signal generators; Test data compression; Test pattern generators; USA Councils;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Asian Test Symposium, 2007. ATS '07. 16th
Conference_Location :
Beijing
ISSN :
1081-7735
Print_ISBN :
978-0-7695-2890-8
Type :
conf
DOI :
10.1109/ATS.2007.52
Filename :
4387987
Link To Document :
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