DocumentCode :
2197581
Title :
Scalable and configurable software/hardware development for voice over packet networks
Author :
Gravante, B.D. ; Arya, D. ; Priebe, R. ; Lu, J.
Author_Institution :
Improv Syst. Inc., Beverly, MA, USA
fYear :
2000
fDate :
13-15 June 2000
Firstpage :
106
Lastpage :
107
Abstract :
This paper investigates the use of a scalable and configurable architecture on a voice over packet (VoP) network application consisting of an ensemble of signal processing components including a speech codec, and an echo canceller. Each of these components imposes different demands on processor resources and the processor engines can be configured to suit the needs of the application. This paper discusses system-on-chip (SoC) design methodology and the implementation of the VoP application and compares the performance of VoP components with various processor configurations.
Keywords :
Echo suppression; Multiprocessing systems; Packet switching; Software engineering; Speech codecs; Telecommunication computing; Voice communication; VoP network application; advanced compilation system; configurable architecture; configurable software/hardware development; consumer electronics market; echo canceller; high-level application design; multiprocessor VLIW platform; performance; processor configurations; processor engines; processor resources; scalable architecture; scalable software/hardware development; signal processing components; speech codec; system-on-chip design; voice over packet networks; Application software; Computer architecture; Decoding; Echo cancellers; Engines; Hardware; Parallel processing; Pulse modulation; Speech codecs; VLIW;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Consumer Electronics, 2000. ICCE. 2000 Digest of Technical Papers. International Conference on
Conference_Location :
Los Angles, CA, USA
Print_ISBN :
0-7803-6301-9
Type :
conf
DOI :
10.1109/ICCE.2000.854517
Filename :
854517
Link To Document :
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