DocumentCode :
2197795
Title :
A 2-ps Resolution Wide Range BIST Circuit for Jitter Measurement
Author :
Cheng, Nai-Chen Daniel ; Lee, Yu ; Chen, Ji-Jan
Author_Institution :
Ind. Technol. Res. Inst., Hsinchu
fYear :
2007
fDate :
8-11 Oct. 2007
Firstpage :
219
Lastpage :
223
Abstract :
In this paper, we propose a novel built-in self-test (BIST) circuit to directly measure cycle-to-cycle jitter. The clock-under-test is under-sampled by this measurement circuit and the jitter values are transformed into digital words. A time-amplified technique is applied to obtain relatively higher resolution with smaller hardware overhead. Experimental results show that our proposed circuit is able to measure the jitter providing the clock frequency up to 2 GHz with resolution of 2 picoseconds.
Keywords :
built-in self test; clocks; timing jitter; BIST circuit; built-in self-test; clock-under-test; cycle-to-cycle jitter; time 2 ps; time-amplified technique; Automatic testing; Built-in self-test; Circuit testing; Clocks; Delay; Frequency measurement; Hardware; Integrated circuit measurements; Jitter; Phase measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Asian Test Symposium, 2007. ATS '07. 16th
Conference_Location :
Beijing
ISSN :
1081-7735
Print_ISBN :
978-0-7695-2890-8
Type :
conf
DOI :
10.1109/ATS.2007.46
Filename :
4388016
Link To Document :
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