Monitoring Transient Errors in Sequential Circuits

Transient errors have become a major concern due to advances in technology scaling. Existing detection techniques for these errors, such as dual modular redundancy (DMR), have very high area overhead as they typically target all possible faults. In this paper, we analyze the effect of transient faults on sequential circuit behavior. We introduce the notion of transition errors (TEs) to capture the critical errors caused by both transient and permanent faults. We also present an error-monitoring scheme aimed specifically at TEs. Finally we describe experiments using the MCNC synthesis benchmark suite which show that, using the proposed monitoring scheme, all TEs can be detected with about 36% area overhead, which is significantly less than alternative approaches like DMR.