DocumentCode
2199309
Title
On the bandwidth availability of multistage interconnection networks
Author
Veglis, A.A. ; Pombortsis, A.S.
Author_Institution
Dept. of Phys., Thessaloniki Univ., Greece
fYear
1993
fDate
27-29 Jan 1993
Firstpage
284
Lastpage
290
Abstract
In this paper, we develop a model that describes the behaviour of a multistage interconnection network (MIN) interconnecting processors and memory modules, when faults exist among the functional units (the processors, memory modules, switching elements and links). Based on this model, we compare the performability of various MIN systems that employ extra stages, or multiple disjoint copies of MINs vertically stacked
Keywords
multiprocessor interconnection networks; bandwidth availability; extra stages; functional unit faults; links; memory modules; multiprocessor interconnection network; multistage interconnection networks; performability; switching elements; vertically stacked multiple disjoint copies; Availability; Bandwidth; Costs; Degradation; Delay; Fault tolerance; Intelligent networks; Multiprocessing systems; Multiprocessor interconnection networks; Telecommunication network reliability;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Processing, 1993. Proceedings. Euromicro Workshop on
Conference_Location
Gran Canaria
Print_ISBN
0-8186-3610-6
Type
conf
DOI
10.1109/EMPDP.1993.336390
Filename
336390
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