Using commercial semiconductor technologies in space

Author

Johnston, A.H. ; Lee, C.I. ; Rax, B.G. ; Shaw, D.C.

Author_Institution

California Inst. of Technol., Pasadena, CA, USA

fYear

1995

fDate

18-22 Sep 1995

Firstpage

175

Lastpage

182

Abstract

New issues are discussed that must be considered when unhardened commercial technologies are used in space applications, as well as hardness assurance techniques. Large differences in dose-rate effects were observed for different circuit types from the same manufacturer, which may be due to differences in the thickness of isolation oxides used in processing. Data are presented for scaled MOS devices that show how total dose hardness and hard error rates are projected as devices are scaled to smaller feature size. Hard errors are expected to be a significant problem for devices with feature size below 0.6 μm

Keywords

CMOS integrated circuits; bipolar integrated circuits; integrated circuit reliability; integrated circuit testing; isolation technology; radiation hardening (electronics); space vehicle electronics; 0.6 mum; CMOS circuits; bipolar technologies; commercial semiconductor technologies; dose-rate effects; feature size; hard error rates; hardness assurance techniques; isolation oxide thickness; scaled MOS devices; space environment; spacecraft electronics; total dose hardness; Circuit testing; Degradation; Error analysis; Isolation technology; Laboratories; Linear circuits; MOS devices; Manufacturing processes; Propulsion; Space technology;

fLanguage

English

Publisher

ieee

Conference_Titel

Radiation and its Effects on Components and Systems, 1995. RADECS 95., Third European Conference on

Conference_Location

Arcachon

Print_ISBN

0-7803-3093-5

Type

conf

DOI

10.1109/RADECS.1995.509774

Filename

509774