Applying a Counter-based PFM Control Strategy to an FPGA-based SR Forward Converter

Author

Hwu, K.I. ; Yau, Y.T.

Author_Institution

Dept. of Electr. Eng., Taipei Univ. of Technol.

fYear

2006

fDate

14-17 Nov. 2006

Firstpage

1

Lastpage

4

Abstract

A field programmable gate arrays (FPGA) technique applied to a forward converter is presented to design a pulse-frequency-modulation (PFM) controller, along with protection peripherals. With only one comparator and without any analogue-to-digital converter (ADC), the information on the feedback output voltage is entirely obtained according to a counter. Besides, the control effort is calculated and used during the present period, thus causing the transient load response to be very fast. In this paper, the operation of this control topology is illustrated, along with some experimental results to demonstrate its effectiveness

Keywords

comparators (circuits); field programmable gate arrays; power convertors; pulse frequency modulation; transient response; FPGA technique; comparator; control topology; counter-based PFM control strategy; field programmable gate array; pulse-frequency-modulation controller; synchronous rectification forward converter; transient load response; Channel bank filters; Control systems; Counting circuits; Field programmable gate arrays; Output feedback; Pulse width modulation; Strontium; Switches; Switching frequency; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

TENCON 2006. 2006 IEEE Region 10 Conference

Conference_Location

Hong Kong

Print_ISBN

1-4244-0548-3

Electronic_ISBN

1-4244-0549-1

Type

conf

DOI

10.1109/TENCON.2006.344108

Filename

4142223