Title :
A cost effective architecture for HDTV with 2D/3D graphics
Author_Institution :
ATI Technol. Inc., Toronto, Ont., Canada
Abstract :
An integrated MPEG-2 transport demultiplexer and MP@HL video decoder and 2D/3D graphics core are presented. The described architecture integrates all digital decoding and graphics functions into one system, analog video encoding and decoding functions into other system and digital teletext/subtitling decoding functions and user or private data processing on a midrange performance host CPU (Pentium 200 MHz or MIPS 166 MHz). This results in the greater flexibility and reduction of hardware cost of digital set-top receivers.
Keywords :
decoding; demultiplexing equipment; high definition television; video coding; viewdata; 166 MHz; 200 MHz; 2D/3D graphics; 2D/3D graphics core; HDTV; MP@HL video decoder; Pentium processor; analog video decoding; analog video encoding; cost effective architecture; digital decoding; digital set-top receivers; digital teletext/subtitling decoding; graphics functions; hardware cost reduction; integrated MPEG-2 transport demultiplexer; midrange performance host CPU; private data processing; user data processing; Costs; Data mining; Decoding; Demultiplexing; Filters; Graphics; HDTV; Hardware; Streaming media; Teletext;
Conference_Titel :
Consumer Electronics, 2000. ICCE. 2000 Digest of Technical Papers. International Conference on
Conference_Location :
Los Angles, CA, USA
Print_ISBN :
0-7803-6301-9
DOI :
10.1109/ICCE.2000.854694
