Design of a multicast packet switch architecture for ATM networks

Author

Fliesser, R.J. ; Rahman, M.H. ; Mouftah, H.T.

Author_Institution

Dept. of Electr. & Comput. Eng., R. Mil. Coll. of Canada, Kingston, Ont., Canada

fYear

1993

fDate

12-15 Dec. 1993

Firstpage

30

Lastpage

36

Abstract

The paper presents the design and performance evaluation of an ATM switch with multicasting capability. It consists of an input network, a copy network and an output network. The copy network consists of three non-blocking networks and two shared-memory buffers which pressure cell sequencing. It has an overflow controller which controls overflow of cells in the copy network and allows partial cell expansion. The architecture uses fully distributed control and thereby scales well to large size switches.<>

Keywords

asynchronous transfer mode; buffer storage; electronic switching systems; packet switching; shared memory systems; telecommunication traffic; ATM networks; copy network; design; fully distributed control; input network; multicast packet switch architecture; nonblocking networks; output network; overflow controller; partial cell expansion; performance evaluation; pressure cell sequencing; shared-memory buffers; Asynchronous transfer mode; B-ISDN; Costs; Design engineering; Distributed control; Educational institutions; Packet switching; Routing; Switches; Switching systems;

fLanguage

English

Publisher

ieee

Conference_Titel

Global Data Networking, 1993. Proceedings

Conference_Location

Cairo, Egypt

Print_ISBN

0-8186-4270-X

Type

conf

DOI

10.1109/GDN.1993.336589

Filename

336589