DocumentCode :
2202322
Title :
Deadlock avoidance control synthesis in manufacturing systems using model checking
Author :
Wang, Yin ; Wu, Zhiming
Author_Institution :
Shanghai Jiaotong University
Volume :
2
fYear :
2003
fDate :
June 4-6, 2003
Firstpage :
1702
Lastpage :
1704
Keywords :
Automata; Automatic control; Control system synthesis; Digital audio players; Logic; Manufacturing automation; Manufacturing systems; Polynomials; Routing; System recovery;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
American Control Conference, 2003. Proceedings of the 2003
ISSN :
0743-1619
Print_ISBN :
0-7803-7896-2
Type :
conf
DOI :
10.1109/ACC.2003.1239839
Filename :
1239839
Link To Document :
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