DocumentCode
2202861
Title
BIST-based delay-fault testing in FPGAs
Author
Abramovici, Miron ; Stroud, Charles
Author_Institution
Circuits & Syst. Res. Lab., Agere Syst., Murray Hill, NJ, USA
fYear
2002
fDate
2002
Firstpage
131
Lastpage
134
Abstract
We present the first delay-fault testing approach for FPGAs, applicable both for manufacturing and for on-line testing. Our approach is based on BIST, is comprehensive, and does not require expensive ATE. We have successfully implemented this BIST approach on the ORCA 2C series FPGA.
Keywords
built-in self test; fault diagnosis; fault tolerant computing; field programmable gate arrays; integrated circuit testing; logic testing; BIST technique; FPGA; ORCA 2C series; VLSI; configurable interconnect points; delay-fault testing; fault tolerance; off-line testing; on-line testing; parallel STAR; roving STAR; Application specific integrated circuits; Built-in self-test; Circuit faults; Circuit testing; Clocks; Delay; Field programmable gate arrays; Frequency; Logic testing; Manufacturing;
fLanguage
English
Publisher
ieee
Conference_Titel
On-Line Testing Workshop, 2002. Proceedings of the Eighth IEEE International
Print_ISBN
0-7695-1641-6
Type
conf
DOI
10.1109/OLT.2002.1030195
Filename
1030195
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