DocumentCode :
2203036
Title :
Adaptive IDDQ: how to set an IDDQ limit for any device under test
Author :
Dallavalle, C.
Author_Institution :
ST Microelectron., Brianza, Italy
fYear :
2002
fDate :
2002
Firstpage :
177
Abstract :
The combination of deep submicron technologies together with system on chip complexity has brought the device under test (DUT) quiescent supply current (IDDQ) into the milliamps range. This IDDQ level, modulated by electrical parameters and critical dimensions process spreads, makes almost impossible to detect the small current increase caused by the presence of a defect into the DUT. The integration of a limited size IDDQ cell into the DUT, combined with automatic test equipment measurements and calculations allows to define an IDDQ limit for every DUT during electrical wafer sort revitalizing a powerful way to prevent defective chips can reach the application field.
Keywords :
CMOS integrated circuits; automatic test equipment; electric current measurement; integrated circuit testing; production testing; ATE; adaptive IDDQ; device under test quiescent supply current; electrical wafer sort; limited size cell; mass production CMOS technologies; small current increase; system on chip complexity; Automatic test equipment; CMOS technology; Current supplies; Electric variables measurement; Mass production; Microelectronics; Semiconductor device measurement; System testing; System-on-a-chip; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
On-Line Testing Workshop, 2002. Proceedings of the Eighth IEEE International
Print_ISBN :
0-7695-1641-6
Type :
conf
DOI :
10.1109/OLT.2002.1030203
Filename :
1030203
Link To Document :
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