A dynamic dataflow model suitable for efficient mixed hardware and software implementations of DSP applications

Author

Buck, Joseph T.

Author_Institution

Synopsys Inc., Mountain View, CA, USA

fYear

1994

fDate

22-24 Sep 1994

Firstpage

165

Lastpage

172

Abstract

This paper presents an analytical model for the behavior of dataflow graphs with data-dependent control flow and discusses its suitability to the generation of efficient software and hardware implementations of digital signal processing (DSP) applications. In the model, the number of tokens produced or consumed by each actor is given as a symbolic function of the Boolean values in the system; in addition, it may vary cyclically to permit more memory-efficient multirate implementations. The model can be used to extend the ability of block-diagram-oriented systems for DSP design to produce efficient hardware and software implementations; this permits the hardware-software codesign techniques to be efficiently targeted at a wider class of problems, those involving some asynchronous behavior, for example

Keywords

parallel processing; signal processing; Boolean values; DSP applications; analytical model; block-diagram-oriented systems; dataflow graphs; dynamic dataflow model; memory-efficient multirate implementations; mixed hardware and software implementations; symbolic function; tokens; Analytical models; Application software; Application specific integrated circuits; Automata; Digital signal processing; Hardware; Integrated circuit modeling; Signal design; Signal processing; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Hardware/Software Codesign, 1994., Proceedings of the Third International Workshop on

Conference_Location

Grenoble

Print_ISBN

0-8186-6315-4

Type

conf

DOI

10.1109/HSC.1994.336710

Filename

336710