A dynamic dataflow model suitable for efficient mixed hardware and software implementations of DSP applications

This paper presents an analytical model for the behavior of dataflow graphs with data-dependent control flow and discusses its suitability to the generation of efficient software and hardware implementations of digital signal processing (DSP) applications. In the model, the number of tokens produced or consumed by each actor is given as a symbolic function of the Boolean values in the system; in addition, it may vary cyclically to permit more memory-efficient multirate implementations. The model can be used to extend the ability of block-diagram-oriented systems for DSP design to produce efficient hardware and software implementations; this permits the hardware-software codesign techniques to be efficiently targeted at a wider class of problems, those involving some asynchronous behavior, for example