De-embedding Techniques on a 0.25 μm Digital CMOS Process

Author

Rosales, Marc D. ; Alarcon, Louis P. ; Sabido, Delfin Jay

Author_Institution

Electr. & Electron. Eng., Univ. of the Philippines, Quezon

fYear

2006

fDate

14-17 Nov. 2006

Firstpage

1

Lastpage

4

Abstract

Fully intregrated radio frequency circuits require the use of several passive devices. In designing these circuits, there is a need to know how these circuit elements behave. Inductors implemented on silicon are not easily characterized compared to their discrete counterparts. On-wafer measurement is necessary to understand the characteristics of these inductors that are implemented on silicon. This will give a better insight in the design of RF circuit that will utilize these components. In this study, several inductor structures were fabricated on a 0.25 μm CMOS process which will serve as the device under test (DUT). Open, Short1, Short2 and Thru structures were also implemented to characterize the different OPEN and THREE step de-embedding techniques

Keywords

CMOS integrated circuits; embedded systems; integrated circuit testing; radiofrequency integrated circuits; 0.25 micron; DUT; deembedding technique; device under test; digital CMOS process; inductor structures; integrated radio frequency circuits; on-wafer measurement; passive devices; CMOS process; Calibration; Circuits; Fixtures; Inductors; Joining processes; Probes; Radio frequency; Silicon; Testing; de-embedding; monolithic spiral inductors; on-chip measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

TENCON 2006. 2006 IEEE Region 10 Conference

Conference_Location

Hong Kong

Print_ISBN

1-4244-0548-3

Electronic_ISBN

1-4244-0549-1

Type

conf

DOI

10.1109/TENCON.2006.344122

Filename

4142350