Title :
Analysis of the equivalences and dominances of transient faults at the RT level
Author :
Berrojo, Luis ; González, Isabel ; Entrena, Luis ; López, Celia ; Corno, Fulvio ; Sonza, Matteo ; Squillero, Giovanni
Author_Institution :
Alcatel Espacio, Madrid, Spain
Abstract :
This work presents a study for tackling transient faults at the RT-level and outlines the techniques devised and implemented to speed-up fault-injection campaigns, detecting the equivalences and dominances between faults in order to collapse them. Experimental results are provided on an industrial case study, demonstrating the effectiveness of the approach.
Keywords :
fault simulation; flip-flops; logic CAD; logic testing; SADE circuits; controllability; dominances; equivalences; fault simulation; fault tolerant circuits; fault-collapsing; fault-free simulation; fault-injection platform; flip-flops; observability; register transfer level; transient faults; Circuit faults; Circuit simulation; Circuit topology; Controllability; Fault detection; Fault tolerance; Flip-flops; Single event transient; Testing; Transient analysis;
Conference_Titel :
On-Line Testing Workshop, 2002. Proceedings of the Eighth IEEE International
Print_ISBN :
0-7695-1641-6
DOI :
10.1109/OLT.2002.1030216
