Title :
Determining noise levels in VLSI circuits
Author_Institution :
OptEM Engineering Inc., Calgary, Alta., Canada
Abstract :
Electromagnetic modeling of VLSI interconnects and interconnect circuit simulation are discussed. The Helmholtz equation is used to build models which include eddy-current loss and dielectric loss. Equivalent circuits with high cutoff frequencies and the smallest possible number of components are assembled. The performance of a VLSI interconnect at different clock rates is analyzed
Keywords :
Helmholtz equations; VLSI; circuit analysis computing; dielectric losses; eddy current losses; equivalent circuits; integrated circuit interconnections; integrated circuit modelling; integrated circuit noise; EM field analysis; EM modelling; Helmholtz equation; VLSI interconnects; clock rates; dielectric loss; eddy-current loss; equivalent circuits; high cutoff frequencies; interconnect circuit simulation; noise levels; performance; Assembly; Circuit simulation; Cutoff frequency; Dielectric losses; Electromagnetic modeling; Equations; Equivalent circuits; Integrated circuit interconnections; Noise level; Very large scale integration;
Conference_Titel :
Electromagnetic Compatibility, 1993. Symposium Record., 1993 IEEE International Symposium on
Conference_Location :
Dallas, TX
Print_ISBN :
0-7803-1304-6
DOI :
10.1109/ISEMC.1993.473715
