DocumentCode :
2204397
Title :
Design of a gigabit ATM switch
Author :
Chaney, Tom ; Fingerhut, J. Andrew ; Flucke, Margaret ; Turner, Jonathan S.
Author_Institution :
Washington Univ., St. Louis, MO, USA
Volume :
1
fYear :
1997
fDate :
7-12 Apr 1997
Firstpage :
2
Abstract :
This paper describes the design and implementation of a gigabit ATM switching system supporting link rates from 150 Mb/s to 2.4 Gb/s, with a uniquely efficient multicast switch architecture that enables the construction of systems with essentially constant per port costs for configurations ranging from 8 to 4096 ports and system capacities approaching 10 Tb/s. The system design supports many-to-one and many-to-many forms of multicast, in addition to the usual one-to-many. It also provides multicast virtual paths, constant time configuration of multicast connections and an efficient packet-level discard method, that can achieve 100% link efficiencies, without large buffers
Keywords :
asynchronous transfer mode; electronic switching systems; telecommunication congestion control; 10 Tbit/s; 150 Mbit/s to 2.4 Gbit/s; configurations; constant time configuration; design; efficient packet-level discard method; gigabit ATM switch; link efficiencies; link rates; multicast connections; multicast switch architecture; multicast virtual paths; system capacities; Asynchronous transfer mode; Communication switching; Cost function; Large-scale systems; National electric code; Packet switching; Routing; Switches; Switching systems; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
INFOCOM '97. Sixteenth Annual Joint Conference of the IEEE Computer and Communications Societies. Driving the Information Revolution., Proceedings IEEE
Conference_Location :
Kobe
ISSN :
0743-166X
Print_ISBN :
0-8186-7780-5
Type :
conf
DOI :
10.1109/INFCOM.1997.635108
Filename :
635108
Link To Document :
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