DocumentCode
2204451
Title
Derivation of optimum test sequencies for sequential machines
Author
Poage, J.F. ; McCluskey, E.J., Jr.
fYear
1964
fDate
11-13 Nov. 1964
Firstpage
121
Lastpage
132
Abstract
A technique is presented for deriving the shortest sequence of input symbols which must be applied to a sequential machine to guarantee that no fault from a set {p} exists within the machine. Flow tables are used to describe the machine for which a test is desired as well as all defective machines into which it is transformed by the faults of {p}. The set of flow tables is combined into a single composite table from which the optimum test sequence is found. Use of a composite table has the advantage that all possible sequences of input symbols need not be investigated. A large class of sequences which cannot possibly lead to an optimum test is easily recognized and discarded.
Keywords
Circuit faults; Circuit testing; Combinational circuits; Electrical fault detection; Fault detection; Feedback loop; Laboratories; Logic testing; Sequential analysis; Telephony;
fLanguage
English
Publisher
ieee
Conference_Titel
Switching Circuit Theory and Logical Design, 1964 Proceedings of the Fifth Annual Symposium on
Conference_Location
Princeton, NJ, USA
Type
conf
DOI
10.1109/SWCT.1964.7
Filename
4569813
Link To Document