Efficient Spatial-Temporal Coding Scheme for Minimizing Delay in Interconnects

In deep-submicron (DSM) technology as the wire size is shrinking and the lines are coming closer, the propagation delay of the on-chip interconnects is rapidly increasing. There are various works proposed in the literature such as shielding, coding etc to minimize delay in bus lines. This paper concentrates on minimizing delay on bus lines by suitably encoding the data on the bus. A coding scheme has been proposed for reducing the delay by incorporating spatial and temporal redundancy. Theoretical proof and experimental results elucidate that the proposed coding scheme eliminates the crosstalk classes 4, 5 and 6, thereby accelerating the propagation delay by 5.7 and 6.19 for 2 mm and 5 mm length bus respectively