Realization of a nonlinear digital filter on a DSP array processor

Author

Kwan, Hercule ; Powers, Edward J. ; Swartzlander, Earl E., Jr.

Author_Institution

Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA

fYear

1997

fDate

14-16 Jul 1997

Firstpage

24

Lastpage

33

Abstract

This paper presents the performance evaluation of a fast third-order Volterra digital filtering algorithm mapped onto an AT&T DSP-3 parallel processor. Five different implementations are considered. Speed-up results indicate that the “time-skewing” method is currently the fastest. An application to nonlinear communication channel equalization using a 64-QAM signal constellation is presented

Keywords

digital filters; digital signal processing chips; parallel processing; performance evaluation; quadrature amplitude modulation; 64-QAM signal constellation; AT&T DSP-3 parallel processor; nonlinear communication channel equalization; nonlinear digital filter; performance evaluation; third-order Volterra digital filtering algorithm; time-skewing; Communication channels; Convolution; Digital filters; Digital signal processing; Discrete Fourier transforms; Filtering algorithms; Frequency; Kernel; Navigation; Nonlinear filters;

fLanguage

English

Publisher

ieee

Conference_Titel

Application-Specific Systems, Architectures and Processors, 1997. Proceedings., IEEE International Conference on

Conference_Location

Zurich

ISSN

2160-0511

Print_ISBN

0-8186-7959-X

Type

conf

DOI

10.1109/ASAP.1997.606809

Filename

606809