• DocumentCode
    2205003
  • Title

    Ultra low voltage complementary metal oxide semiconductor (ULV-CMOS) circuits: bulk CMOS operation below threshold (VTO)

  • Author

    Splain, Curtis G. ; O, Kenneth K.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Florida Univ., Gainesville, FL, USA
  • fYear
    1996
  • fDate
    11-14 Apr 1996
  • Firstpage
    670
  • Lastpage
    673
  • Abstract
    To achieve greater reduction in inverter operating voltage and power consumption, ULV-CMOS circuits operating with supply voltages of 900 mV and lower were implemented using bulk processed CMOS transistors. The low voltage operation was achieved by applying the input to both the gate and body of the CMOS transistors. The input voltage forward biases the body to source junction(s), which in turn lowers the VT´s (threshold voltage) and makes the lower voltage operation possible. A flip-flop and a three stage inverter chain using this technique have been demonstrated
  • Keywords
    CMOS logic circuits; flip-flops; logic gates; power consumption; 900 mV; below threshold operation; bulk CMOS operation; dynamic operation; flip-flop; forward bias; inverter operating voltage; power consumption; static operation; three stage inverter chain; ultralow voltage CMOS circuits; CMOS process; Circuits; Energy consumption; Inverters; Low voltage; MOS devices; MOSFETs; Power engineering and energy; Power engineering computing; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Southeastcon '96. Bringing Together Education, Science and Technology., Proceedings of the IEEE
  • Conference_Location
    Tampa, FL
  • Print_ISBN
    0-7803-3088-9
  • Type

    conf

  • DOI
    10.1109/SECON.1996.510154
  • Filename
    510154