Device Integration Issues Towards 10 nm MOSFETs

Author

Ostling, Mikael ; Malm, B. Gunnar ; Von Haartman, Martin ; Hållstedt, Julius ; Zhang, Zhen ; Hellström, Per-Erik ; Zhang, Shili

Author_Institution

Sch. of Inf. Technol., R. Inst. of Technol., Kista

fYear

0

fDate

0-0 0

Firstpage

23

Lastpage

28

Abstract

An overview of critical integration issues for future generation MOSFETs towards 10 nm gate length is presented. Novel materials and innovative structures are discussed. Implementation of high kappa gate dielectrics is presented and device performance is demonstrated for TiN metal gate surface channel SiGe MOSFETs with a gate stack based on ALD-formed HfO₂/Al₂O₃. Low frequency noise properties for those devices are also analyzed. A selective SiGe epitaxy process for low resistivity source/drain contacts has been developed and implemented in pMOSFETs. A spacer pattering technology using optical lithography to fabricate sub 50 nm high-frequency MOSFETs and nanowires is demonstrated. Finally ultra thin body SOI devices with high mobility SiGe channels are demonstrated

Keywords

Ge-Si alloys; MOSFET; elemental semiconductors; hafnium compounds; nanolithography; photolithography; semiconductor device manufacture; titanium compounds; 10 nm; HfO₂-Al₂O₃; MOSFET; SiGe; TiN; device integration; device performance; epitaxial process; gate length; high kappa gate dielectrics; low frequency noise property; low resistivity source-drain contact; metal gate surface channel; nanowires; optical lithography; pMOSFET; spacer pattering technology; ultrathin body SOI devices; Conductivity; Dielectric devices; Dielectric materials; Epitaxial growth; Germanium silicon alloys; Hafnium oxide; Low-frequency noise; MOSFETs; Silicon germanium; Tin;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics, 2006 25th International Conference on

Conference_Location

Belgrade

Print_ISBN

1-4244-0117-8

Type

conf

DOI

10.1109/ICMEL.2006.1650891

Filename

1650891