• DocumentCode
    2206693
  • Title

    Programmable Logic Array Design for H.264 Context-Based Adaptive Variable Length Coding

  • Author

    Tsai, An-Chao ; Paul, Anand ; Wang, Jia-Ching ; Wang, Jhing-Fa

  • Author_Institution
    Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan
  • fYear
    2006
  • fDate
    14-17 Nov. 2006
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this paper, we propose an architecture for context-based adaptive variable length coding using programmable logic array. This design is focused in optimizing the hardware cost and enhancing the speed of encoding. The proposed architecture has been simulated using ModelSim, and implemented by UMC 0.18 mum cell library. Simulation results illustrates that, the proposed design satisfies the real time constrains, required by various video applications with 2475 logic gates at 210 MHz
  • Keywords
    adaptive codes; code standards; logic gates; programmable logic arrays; variable length codes; video coding; 0.18 micron; 210 MHz; H.264 context-based adaptive variable length coding; ModelSim; UMC 0.18 mum cell library; encoding; logic gates; programmable logic array design; Adaptive arrays; Context; Cost function; Design optimization; Encoding; Hardware; Logic design; Logic gates; Programmable logic arrays; Video coding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    TENCON 2006. 2006 IEEE Region 10 Conference
  • Conference_Location
    Hong Kong
  • Print_ISBN
    1-4244-0548-3
  • Electronic_ISBN
    1-4244-0549-1
  • Type

    conf

  • DOI
    10.1109/TENCON.2006.343818
  • Filename
    4142493