Cryptographic Watermarking & Stream Cipher Technique for Robust FPGA Intellectual Property Protection

Stored in the spare space of the configuration non-volatile memory, the authentication message and the program codes of an application specific instruction set processor (ASIP), can constitute a secure programmable logic solution to the SRAM-typed FPGA design. Also, we propose a time varying authentication algorithm by two identical stream cipher algorithms in both FPGA and configuration controller device. The proposed clone-free protection technique has three advantages: First, no extra special chip is needed for authentication and identification. Second, the authentication message and the program codes of the embedded reconfigurable controller can be encrypted or compressed for security purpose. Finally, they all are not included in the readable configuration bit streams