Notched sub-100 nm gate MOSFETs for analog applications

MOSFETs with a notched gate are studied by two-dimensional numerical simulation. It is found that the inclusion of a notch substantially reduces the gate-to-drain and gate-to-source capacitance. Only a minor reduction in drain current and transconductance is found when the physical dimension of the notch is controlled not to exceed the overlap distance between the gate and the source/drain extension. Under such conditions, the cut-off frequency of the MOSFETs with a notched gate can increase by 30% compared to conventional MOSFETs. The largest increase in cut-off frequency is found in the weak and moderate inversion regions. The results suggest that the notched-gate architecture is suitable for high frequency analog CMOS applications