• DocumentCode
    2207548
  • Title

    An efficient and high-performances CMOS op amp with rail-to-rail mode and high CMRR

  • Author

    Klisnick, Geoffroy ; Redon, Michel

  • Author_Institution
    Lab. d´´Electron. Analogique et Micro-ondes, Paris VI Univ., France
  • fYear
    1996
  • fDate
    13-14 Sep 1996
  • Firstpage
    102
  • Lastpage
    107
  • Abstract
    In this paper, we present a new structure of a CMOS Op Amp offering high performances differential frequency response with high CMRR, high slew rate and input/output rail-to-rail mode. These performances are due both to a new efficient gain stage with a compact layout and to a simple way to obtain a high CMRR. Simulation experiments have been performed with three different (0.8 μm, 1.2 μm, 2.4 μm) CMOS technologies. In particular for the 0.8 μm one, the main performances-under single 5 V power supply are a unity gain bandwidth of 40 MHz, a phase margin of 63 degrees, a slew rate of 60 V/μs, all performed on heavy load such as 2.5 kΩ||20 pF. Simulated results have been experimentally confirmed for the 2.4 μm CMOS technology for which we have measured a low frequency CMRR of 100 dB
  • Keywords
    CMOS analogue integrated circuits; differential amplifiers; frequency response; operational amplifiers; 0.8 to 2.4 micron; 40 MHz; 5 V; compact layout gain stage; differential frequency response; high CMRR; high slew rate; high-performance CMOS op amp; monolithic op amp; rail-to-rail mode; Bandwidth; CMOS technology; Differential amplifiers; Frequency response; Operational amplifiers; Performance gain; Rail to rail amplifiers; Rail to rail inputs; Rail to rail outputs; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Analog and Mixed IC Design, 1996., IEEE-CAS Region 8 Workshop on
  • Conference_Location
    Pavia
  • Print_ISBN
    0-7803-3625-9
  • Type

    conf

  • DOI
    10.1109/AMICD.1996.569397
  • Filename
    569397