The influence of substrate junctions on notch formation in the etching of storage stack polysilicon

Author

Kang, Chang-Jin ; Jeong, Hong-Sik ; Shin, Kyoung-Sub ; Moon, Joo-Tae ; Lee, Moon-Yong

Author_Institution

Semicond. Res. & Dev., Samsung Electron. Co. Ltd., Kyungki-do, South Korea

fYear

1998

fDate

4-5 Jun 1998

Firstpage

112

Lastpage

115

Abstract

Notch formation during storage stack polysilicon etching depending on the various substrate junctions can be explained theoretically by the effect of charge flow through the p-n junctions. The ion charge flow through the junctions made the stack polysilicon potential lower, compared to that of the bottom oxide layer, and the notch was formed by the greater ion trajectory deflection

Keywords

DRAM chips; dielectric thin films; elemental semiconductors; integrated circuit testing; p-n junctions; plasma materials processing; silicon; sputter etching; DRAM device; Si; SiO₂-Si; bottom oxide layer; charge flow; etching; ion charge flow; ion trajectory deflection; notch formation; p-n junctions; stack polysilicon potential; storage stack polysilicon; storage stack polysilicon etching; substrate junction effect; substrate junctions; Capacitors; Electrodes; Electrons; Etching; P-n junctions; Plasma applications; Plasma immersion ion implantation; Plasma temperature; Silicon; Substrates;

fLanguage

English

Publisher

ieee

Conference_Titel

Plasma Process-Induced Damage, 1998 3rd International Symposium on

Conference_Location

Honolulu, HI

Print_ISBN

0-9651577-2-5

Type

conf

DOI

10.1109/PPID.1998.725587

Filename

725587