DocumentCode
2208569
Title
Parity simulation of static power conversion systems
Author
Kassakian, J. ; Medora, ??. ; Rhodes, B.
Author_Institution
Massachusetts Institute of Technology, Cambridge, Massachusetts
fYear
1977
fDate
14-16 June 1977
Firstpage
324
Lastpage
328
Abstract
An analog/digital simulation technique employing a high degree of parity between the topology of the model and the topology of the modeled system is described. The existence of such topological Isomorphism allows a true "breadboard" approach to simulation. The application, components, and versatility of the system are discussed. Results of a current commutated chopper simulation are presented and compared with the actual circuit behavior.
Keywords
Analog computers; Computational modeling; Integrated circuit modeling; Mathematical model; Switching circuits; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Electronics Specialists Conference, 1977 IEEE
Conference_Location
Palo Alto, CA, USA
ISSN
0275-9306
Type
conf
DOI
10.1109/PESC.1977.7070837
Filename
7070837
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