• DocumentCode
    2208661
  • Title

    Memory resource considerations in the load balancing of software DSM systems

  • Author

    Liu, Yen-Tso ; Liang, Tyng-Yeu ; Huang, Chi-Ting ; Shieh, Ce-Kuen

  • Author_Institution
    Dept. of Electr. Eng., National Chung Kung Univ., Tainan, Taiwan
  • fYear
    2003
  • fDate
    6-9 Oct. 2003
  • Firstpage
    71
  • Lastpage
    78
  • Abstract
    Obtaining a load balance is essential if the program performance of distributed shared memory (DSM) systems is to be optimized. In achieving this load balance, most DSM systems simply distribute program threads in accordance with the CPU power of the individual processors within the network. However, memory access costs also play a significant role in determining the program performance. Although the threads will be able to complete their tasks, their execution will inevitably be delayed by the latency associated with executing the page replacements. With the rapid development of CPU chips, the relative influence of this memory access latency upon the overall program performance has become increasingly significant. Therefore, attempts to minimize the execution time of applications by establishing a load balance based purely upon CPU resource considerations will only achieve limited success. The current study proposes a new load balancing scheme for DSM systems which considers both CPU and memory resources. The present results confirm the importance of considering memory resources when addressing the load balancing of DSM systems. It is shown that the proposed method is more effective than previous schemes which considered only CPU resources or memory resources.
  • Keywords
    distributed shared memory systems; parallel processing; resource allocation; storage management; CPU resource; application execution time minimization; load balancing; memory access costs; memory access latency; memory resource; page replacement; program performance; software distributed shared memory systems; Application software; Computer applications; Computer architecture; Computer networks; Costs; Delay; Load management; Power generation economics; Software systems; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel Processing Workshops, 2003. Proceedings. 2003 International Conference on
  • ISSN
    1530-2016
  • Print_ISBN
    0-7695-2018-9
  • Type

    conf

  • DOI
    10.1109/ICPPW.2003.1240356
  • Filename
    1240356