DocumentCode
2208968
Title
Dual Run-time Environments for Dual Data Memory Bank Architecture
Author
Cho, Jeonghun ; Kwon, Soohyun ; Park, Jinwhi ; Kim, Jungheung
Author_Institution
Sch. of Electr. Eng. & Comput. Sci., Kyungpook Nat. Univ., Daegu
fYear
2006
fDate
14-17 Nov. 2006
Firstpage
1
Lastpage
4
Abstract
Most vendors of digital signal processors (DSPs) support a Harvard architecture, which has two or more memory buses, one for program and one or more for data and allow the processor to access multiple words of data from memory in a single instruction cycle. We already addressed how to efficiently assign data to multi-memory banks in our previous work. This paper reports on our recent attempt to manipulate dual run-time environment. The run-time environment for dual data memory banks requires two run-time stacks to control activation records located in two memory banks corresponding to calling procedures. Unfortunately, several existing compilers use only single stack or fully static dual run-time stack. The former cannot utilize dual data memory banks, and the latter waste run-time memory. Therefore, we provide dual run-time environment based on stacks in this paper. The experimental results have revealed that our run-time environment utilize dual data memory banks efficiently and diminished usage of run-time memory
Keywords
digital signal processing chips; memory architecture; DSP; Harvard architecture; data memory bank architecture; digital signal processors; dual run-time environment; Computer languages; Digital signal processing; Digital signal processors; Finite impulse response filter; Memory architecture; Memory management; National electric code; Programming; Runtime environment; System performance;
fLanguage
English
Publisher
ieee
Conference_Titel
TENCON 2006. 2006 IEEE Region 10 Conference
Conference_Location
Hong Kong
Print_ISBN
1-4244-0548-3
Electronic_ISBN
1-4244-0549-1
Type
conf
DOI
10.1109/TENCON.2006.344087
Filename
4142597
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