• DocumentCode
    2208991
  • Title

    DSP implementation of low bit-rate CELP based speech orders

  • Author

    Suddle, M.R. ; Kondoz, A.M. ; Evans, B.G.

  • Author_Institution
    Surrey Univ., Guildford, UK
  • fYear
    1991
  • fDate
    2-6 Sep 1991
  • Firstpage
    309
  • Lastpage
    314
  • Abstract
    Low bit-rate speech coding techniques are very important in applications where power and bandwidth are very limited. Prime requirements for speech coding are low bit-rate, high quality and low implementation cost. Since 1984 CELP coding of speech has been most popular at medium to low bit-rates. The major drawback of CELP coding, however, has been its large computational requirement. The authors report on the real-time implementation of a CELP coder in a single DSP32C floating-point processor on a four-layer single Eurocard size board with its appropriate input/output stages and 32 kbytes of external RAM. They also report on various complexity reduction techniques that they have employed to achieve a single DSP solution for both encoder, decoder and a very effective voice activity detection (VAD) devices
  • Keywords
    codecs; digital signal processing chips; encoding; filtering and prediction theory; speech analysis and processing; CELP coder; CELP coding; DSP32C floating-point processor; Eurocard size board; RAM; complexity reduction techniques; decoder; encoder; input/output stages; low bit rate; real-time implementation; speech coding; speech orders; speech quality; voice activity detection device;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Digital Processing of Signals in Communications, 1991., Sixth International Conference on
  • Conference_Location
    Loughborough
  • Print_ISBN
    0-85296-522-2
  • Type

    conf

  • Filename
    151950