Title :
Design of low-power K-band low-noise amplifier in 0.18 μm CMOS
Author :
Deng, Ping-Yuan ; Lo, Yu-Tsung ; Kiang, Jean-Fu
Author_Institution :
Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
A K-band low-noise amplifier (LNA) is designed and fabricated in a standard 0.18 μm CMOS technology. A design method of CMOS LNA is used to render the optimum source resistance (Ropt) close to 50 Ω and Zin=Zopt* by using small devices and small bias currents. This LNA chip achieves a peak gain of 13.5 dB and a noise figure of 4.7 dB at 24 GHz. The supply voltage and current are 1 V and 8.3 mA, respectively. The input and output return losses are lower than -10 dB, the input referred 1-dB compression P1db is -7 dBm, and the chip size is 0.64 mm × 0.48 mm.
Keywords :
CMOS analogue integrated circuits; integrated circuit design; low noise amplifiers; microwave amplifiers; CMOS technology; LNA chip; current 8.3 mA; frequency 24 GHz; gain 13.5 dB; low-power K-band low noise amplifier; noise figure 4.7 dB; optimum source resistance; size 0.18 mum; voltage 1 V; CMOS integrated circuits; CMOS technology; Gain; Noise; Noise figure; Power demand; Transmission line measurements;
Conference_Titel :
Applications of Electromagnetism and Student Innovation Competition Awards (AEM2C), 2010 International Conference on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-6416-6
DOI :
10.1109/AEM2C.2010.5578761
