Title :
Effect Of Layout On Gate Oxide Defects At Gate Edges
Author :
Jiang, Chun ; Pramanik, Dipankar ; Gabriel, Calvin
Author_Institution :
VLSI Technology, Inc.
Keywords :
Antenna measurements; CMOS technology; Capacitors; Circuit testing; Dielectric breakdown; Lead compounds; Semiconductor device measurement; Stress; Very large scale integration; Voltage;
Conference_Titel :
Integrated Reliability Workshop Final Report, 1993 International
DOI :
10.1109/IRWS.1993.666299
