Title :
Breakdown voltage reduction in I-MOS devices
Author :
Choi, Woo Young ; Song, Jae Young ; Kim, Jong Pil ; Kim, Sang Wan ; Lee, Jong Duk ; Park, Byung-Gook
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., Seoul
Abstract :
Four-stage strategy has been confirmed to reduce the breakdown voltage of 70-nm impact-ionization MOS (I-MOS) devices. Simulation results showed that it was difficult to reduce the breakdown voltage below -5 V only by scaling down some device parameters such as L1, Xj,Se, and tox. Thus, a strained SOI (SSOI) substrate is introduced which has narrow EG. Though it consists of pure silicon, when strain is maximized, it is observed that the breakdown voltage reaches -1.25 V, which is much lower than that of GOI substrate.
Keywords :
MIS devices; energy gap; impact ionisation; semiconductor device breakdown; bandgap; biaxial tensile stress; breakdown voltage; impact-ionization MOS devices; strained SOI substrate; voltage -1.25 V; Avalanche breakdown; Buffer layers; Capacitive sensors; Germanium; Hot carriers; Leakage current; Photonic band gap; Silicon; Substrates; Voltage; I-MOS; breakdown voltage;
Conference_Titel :
Nanotechnology Materials and Devices Conference, 2006. NMDC 2006. IEEE
Conference_Location :
Gyeongju
Print_ISBN :
978-1-4244-0540-4
Electronic_ISBN :
978-1-4244-0541-1
DOI :
10.1109/NMDC.2006.4388776
