Title :
High-bandwidth packet switching on the raw general-purpose architecture
Author :
Chuvpilo, Gleb A. ; Amarasinghe, Saman
Author_Institution :
Lab. for Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA
Abstract :
The switching of packets and other performance-critical tasks in modem Internet routers are done done using application specific integrated circuits (ASICs) or custom-designed hardware, while existing general-purpose architectures have failed to give a useful interface to sufficient bandwidth to support high-bandwidth routing. By using an architecture that is more general-purpose routers can gain from economies of scale and increased flexibility compared to special-purpose hardware. We propose the use of the raw general-purpose processor as both a network processor and switch fabric for multigigabit routing. We show that the raw processor, through its tiled architecture and software-exposed onchip networking, has enough internal and external bandwidth to deal with multigigabit routing
Keywords :
Internet; bandwidth allocation; multiprocessing systems; packet switching; parallel architectures; system-on-chip; telecommunication network routing; ASIC; application specific integrated circuit; custom-designed hardware; economies of scale; general-purpose parallel architecture; high-bandwidth routing; modem Internet router; multigigabit routing; network processor; packet switching; raw general-purpose processor; software-exposed onchip networking; Application specific integrated circuits; Bandwidth; Economies of scale; Hardware; Internet; Modems; Packet switching; Routing; Switches; Switching circuits;
Conference_Titel :
Parallel Processing, 2003. Proceedings. 2003 International Conference on
Conference_Location :
Kaohsiung
Print_ISBN :
0-7695-2017-0
DOI :
10.1109/ICPP.2003.1240560