DocumentCode :
2213206
Title :
A quantitative comparison of two retargetable compilation approaches
Author :
Oh, Sejong ; Paek, Yunheung
Author_Institution :
EECS Dept., Korea Adv. Inst. of Sci. & Technol., Daejon
fYear :
2003
fDate :
9-9 Oct. 2003
Firstpage :
29
Lastpage :
36
Abstract :
In the design of an embedded processor, the compiler design is tightly coupled with the underlying processor architecture, and thus it is crucial to rapidly retarget a compiler along with the change in the architecture in order to expedite the processor design. However, among many compiler writers, there is a controversial issue that has long been argued - whether a compiler can be easily retargetable while it performs sophisticated machine-specific optimizations for a new architecture configuration. We examine this issue by finding some possible cases where optimizations may be impeded on a pathway to building a retargetable compiler. For this, we developed two types of compilation frameworks called user-retargetable and developer-retargetable, and compared their performance
Keywords :
embedded systems; instruction sets; optimising compilers; parallel architectures; compiler design; developer-retargetable compiler; embedded processor; machine-specific optimization; parallel processor architecture; retargetable compilation; user-retargetable compiler; Architecture description languages; Automation; Buildings; Computer architecture; Contracts; Hardware; Humans; Impedance; Optimizing compilers; Process design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Processing, 2003. Proceedings. 2003 International Conference on
Conference_Location :
Kaohsiung
ISSN :
0190-3918
Print_ISBN :
0-7695-2017-0
Type :
conf
DOI :
10.1109/ICPP.2003.1240563
Filename :
1240563
Link To Document :
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