DocumentCode :
2213256
Title :
An FPGA Based Hybrid Processor Emulation Platform
Author :
Wang, Qigang ; Kassa, Rolf ; Shen, Wenbo ; Ijih, Nelson ; Chitlur, Bhushan ; Konow, Michael ; Liu, Dong ; Sheiman, Arthur ; Gupta, Prabhat
fYear :
2010
fDate :
Aug. 31 2010-Sept. 2 2010
Firstpage :
25
Lastpage :
30
Abstract :
This paper introduces a flexible, hybrid emulation platform for processor related emulation. It is based on a modern Xeon server and FPGA. With Intel processors implemented in FPGA and plugged into the Xeon server´s processor socket, and with the Xeon BIOS modified to accommodate different cores, this platform is able to boot OS and run applications while interacting with the Xeon server´s native hardware components. It enables researchers to do architectural changes in FPGA and quickly evaluate their effect on the whole platform. This platform is an ideal vehicle for research on processor technology, SoC architecture, reconfigurable computing, heterogeneous core architecture, etc.
Keywords :
field programmable gate arrays; multiprocessing systems; operating systems (computers); reconfigurable architectures; system-on-chip; FPGA; Intel processor; OS; SoC; Xeon BIOS; Xeon server; field programmable gate array; hybrid processor emulation; processor socket; system-on-chip; FPGA; emulation; synthesizable processor;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2010 International Conference on
Conference_Location :
Milano
ISSN :
1946-1488
Print_ISBN :
978-1-4244-7842-2
Type :
conf
DOI :
10.1109/FPL.2010.16
Filename :
5694215
Link To Document :
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