Title :
Electrical modeling of Through Silicon and Package Vias
Author :
Bandyopadhyay, Tapobrata ; Chatterjee, Ritwik ; Chung, Daehyun ; Swaminathan, Madhavan ; Tummala, Rao
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
This paper presents analytical modeling and 3D full-wave electromagnetic (EM) simulation of the bias voltage dependent semiconductor (MOS) capacitance of a Through Silicon Via (TSV). An accurate electrical model of the TSV is proposed by considering the semiconductor effects. The high-frequency electrical performance of TSVs and Through-Package Vias (TPVs) are compared by means of 3D EM simulations. A parametric study is performed on TSV capacitance and design guidelines are presented for signal and power TSVs.
Keywords :
MOS integrated circuits; monolithic integrated circuits; 3D full-wave electromagnetic simulation; analytical modeling; bias voltage dependent semiconductor capacitance; electrical modeling; high frequency electrical performance; package vias; through silicon via capacitance; Analytical models; Capacitance; Electromagnetic analysis; Electromagnetic modeling; Parametric study; Semiconductor device packaging; Signal design; Silicon; Through-silicon vias; Voltage;
Conference_Titel :
3D System Integration, 2009. 3DIC 2009. IEEE International Conference on
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-4511-0
Electronic_ISBN :
978-1-4244-4512-7
DOI :
10.1109/3DIC.2009.5306542
