Chip-to-chip communication based on capacitive coupling

Author

Cardu, R. ; Scandiuzzo, M. ; Cani, S. ; Perugini, L. ; Franchi, E. ; Canegallo, R. ; Guerrieri, R.

Author_Institution

ARCES, Univ. of Bologna, Bologna, Italy

fYear

2009

fDate

28-30 Sept. 2009

Firstpage

1

Lastpage

6

Abstract

This paper presents a review of the solutions proposed for chip-to-chip communication based on capacitive coupling. Circuit designs, assembly options and various different test cases are presented in this work. It is shown that this 3D technology is capable of transferring digital data between two dies at high-speed with low power consumption, and likewise analog signals without the need for any extra-wafer processing. The results presented highlight the key features of capacitive coupling when compared to other 3D interconnections and justify the effort to overcome some open issues and make it a marketable technology.

Keywords

couplings; integrated circuit interconnections; lead bonding; logic design; system-on-chip; 3D technology; analog signals; capacitive coupling; chip-to-chip communication; circuit designs; circuit testing; digital data; extrawafer processing; low power consumption; other 3D interconnections; wire bonding; Assembly systems; Bonding; Circuit synthesis; Circuit testing; Coupling circuits; Energy consumption; Integrated circuit interconnections; Power system interconnection; Stacking; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

3D System Integration, 2009. 3DIC 2009. IEEE International Conference on

Conference_Location

San Francisco, CA

Print_ISBN

978-1-4244-4511-0

Electronic_ISBN

978-1-4244-4512-7

Type

conf

DOI

10.1109/3DIC.2009.5306549

Filename

5306549